Study at TCU


Name CHEN Olivia
Official Title Associate Professor
Affiliation Computer Science, Information Technology
Profile Olivia Chen is an associate professor in the Department of Computer Science at Tokyo City University, Japan. In 2017, she received her PhD degree in Electronic Engineering from Yokohama National University, Yokohama, Japan. In 2008, she received her bachelor’s degree in Electronic Engineering from Southeastern University, Nanjing, China.

She was an assistant professor in the Institute of Advanced Sciences (2017-2020), a part-time lecturer in Department of Electrical and Computer Engineering, YNU (2014-2017). From 2008 through 2010, she was a system engineer at Sony Electronics, Wuxi, China.

She has been engaged in research on high-performance computing systems using superconducting integrated circuits for eight years. She was invited as young plenary speakers to give a lecture at Applied Superconductivity Conference (ASC2018), the world's largest international conference on superconducting applications. Her research results have also been published in numerous journals (Scientific Report, IEEE Transaction on Applied Superconductivity, Superconductor Science and Technology) and international conferences (ISEC, ASC, EUCAS). In addition to the superconducting area, the research results were widely disseminated to the world through presentations in computer architecture and CAD research fields such as GLSVLSI2019, ISCA2019, ICCD2020, ICCAD2020 and DATE2021.

Since 2017, she has been participating in a research and development program that focuses on developing CAD tools for large-scale superconducting integrated circuits founded by the US IARPA. In 2019, she has been received two national research grants from the Japan Science and Technology Agency (JST) and the Japan Society for the Promotion of Science (JSPS). She currently serves as the principal investigator for both projects.
Research Field(Keyword & Summary)
  1. (1) Superconductive electronics

    Superconducting electronics-based technology has been proposed and utilized for constructing ultra-fast and low-power-dissipation integrated circuits. With tremendous high-energy efficiency when compared to CMOS technology, the superconductor-based logic comprises a promising perspective in building both analog and digital circuits.

  2. (2) Stochastic computing-based deep-learning accelerator

    Stochastic Computing (SC), which uses a bit-stream to represent a number within [-1, 1] by counting the number of ones in the bit-stream, is a low-cost alternative to conventional binary computing for implementing deep-learning accelerators with high scalability and ultra-low hardware footprint.

Representative Papers
  1. (1) Adiabatic Quantum-Flux-Parametron: Towards Building Extremely Energy-Efficient Circuits and Systems, Scientific Reports, vol. 9, no. 10514, pp.1-10, April, 2019.
  2. (2) A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron Superconducting Technology, Proceedings of the 46th Annual International Symposium on Computer Architecture (ISCA’46), 2019.
  3. (3) A Majority Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits, Proceedings of the 2019 Great Lakes Symposium on VLSI (GLSVLSI’2019 ACM), 189 - 194, 2019.
  4. (4) ASAP: An Analytical Strategy for AQFP Placement, Proceedings of IEEE/ACM International Conference On Computer Aided Design (ICCAD), pp. 1-7, 2020.
  5. (5) Towards AQFP-Capable Physical Design Automation, Proceedings of Design, Automation, and Test in Europe (DATE), 2021.
  6. (6) Design of Adiabatic Quantum-Flux-Parametron Register Files using a Top-Down Design Flow, IEEE Trans. on Appl. Supercond, vol. 29, no. 5, pp. 1-4, 2019.
  7. (7) Synthesis Flow for Cell-Based Adiabatic Quantum-Flux-Parametron Structural Circuit Generation With HDL Back-End Verification, IEEE Trans. on Appl. Supercond, vol. 27, no. 4, pp. 1-5, June 2017.
  8. (8) HDL-Based Modeling Approach for Digital Simulation of Adiabatic Quantum Flux Parametron Logic, IEEE Trans. on Appl. Supercond, vol. 26, no. 8, pp. 1-5, Dec. 2016.
  9. (9) Demonstration of a 47.8 GHz High-Speed FFT Processor Using Single-Flux-Quantum Technology, IEEE Trans. on Appl. Supercond, vol. 31, no. 5, pp. 1-5, Aug. 2021.
  10. (10) A semi-custom design methodology and environment for implementing superconductor adiabatic quantum-flux-parametron microprocessors, Superconductor Science and Technology, vol. 33, no. 5, pp. 054006, Mar. 2020.
Award Young Professional of 2019 by American Cryogentic Society
Grant-in-Aid for Scientific Research Support: Japan Society for Promotion of Science (JSPS)
Research Grants/Projects including subsidies, donations, grants, etc. JSPS Grant-in-Aid for Early-Career Scientists Grant No. 19K15041
Recruitment of research assistant(s) Yes
Affiliated academic society (Membership type) IEEE (member)
ACM (member)
Education Field (Undergraduate level) Verilog HDL, VLSI Design
Education Field (Graduate level) Superconductive electronics, Computer Architecture